EEPROM

Electrically erasable programmable read-only memory (EEPROM) chips are similar to PROM devices, but require only electricity to be erased. Architecture or status, performance, power characteristics, and packaging information are all important parameters to consider when searching for EEPROM memory chips.

Electrically Erasable Programmable ROM) A rewritable memory chip that holds its content without power. EEPROMs are bit or byte addressable at the write level, which means either the bit or byte must be erased before it can be re-written. In flash memory, which evolved from EEPROMs and is almost identical in architecture, an entire block of bytes must be erased before writing. In addition, EEPROMs are typically used on circuit boards to store small amounts of instructions and data, whereas flash memory modules hold gigabytes of data for digital camera storage and hard disk replacements

Intersil X90100 is a non-volatile electronically programmable capacitor. The device is programmed through a simple digital interface. After programming, the chosen setting for the device is retained by internal EEPROM storage whether or not DC power is maintained. There are 32 programmable capacitance values selectable, ranging from 7.5pF to 14.5pF in 0.23pF increments, in single-ended mode. The dielectric is highly stable, and the capacitance
exhibits a very low voltage coefficient. It has virtually no dielectric absorbtion and has a very low temperature drift coefficient in differential mode (<50ppm/°C). The X90100 is programmed through three digital interface pins, which have Schmitt triggers and pullup resistors to secure code retention. The three pins, INC, U/D, and CS, are identical in operation to other Intersil chips with up/down interface, such as the X9315 5-bit Digitally Controlled Potentiometer (DCP).

EEPROM and flash memory bit cells are CMOS-based transistors that hold a charge on a "floating gate." With no charge on the floating gate, the transistor acts normally, and a pulse on the control gate causes current to flow. When charged, it blocks the control gate action, and current does not flow. Charging is accomplished by grounding the source and drain terminals and placing sufficient voltage on the control gate tunnel through the oxide to the floating gate. A reverse voltage channeled from another transistor clears the charge by causing it to dissipate into the substrate.